Analysis Software
Documentation for sPHENIX simulation software
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Groups Pages
packet_hbd_fpgashort.cc
Go to the documentation of this file. Or view the newest version in sPHENIX GitHub for file packet_hbd_fpgashort.cc
1 #include "packet_hbd_fpgashort.h"
2 
3 
4 #define HBD_MAX_MODULES 4
5 //#define HBD_NSAMPLES 20
6 
7 Packet_hbd_fpgashort::Packet_hbd_fpgashort(PACKET_ptr data)
8  : Packet_w4 (data)
9 {
10  nr_modules = 0;
11  HBD_NSAMPLES = 24;
12  hbd_parity=0;
13 }
14 
15 int *Packet_hbd_fpgashort::decode ( int *nwout)
16 {
17 
18  int *k;
19 
20  int dlength = getDataLength();
21 
22 
23  k = (int *) findPacketDataStart(packet);
24  if (k == 0)
25  {
26  *nwout = 0;
27  return 0;
28  }
29 
30 
31  int *iarr = new int[ 48 * HBD_NSAMPLES * HBD_MAX_MODULES ];
32 
33 
34  decoded_data2 = new int[ HBD_MAX_MODULES ]; // trig nr
35  decoded_data3 = new int[ HBD_MAX_MODULES ]; // beam clock
36  decoded_data4 = new int[ HBD_MAX_MODULES ]; // module number in crate list
37 
38  memset( iarr, 0, 48*HBD_NSAMPLES*sizeof(int)*HBD_MAX_MODULES);
39  memset( decoded_data2, 0, 4*HBD_MAX_MODULES);
40  memset( decoded_data3, 0, 4*HBD_MAX_MODULES);
41  memset( decoded_data4, 0, 4*HBD_MAX_MODULES);
42 
43  int pos = 0;
44  int log_mod_nr;
45  int l1_trig_nr;
46  int beam_clock;
47  int phys_mod_nr;
48 
49  while ( pos < dlength - 10)
50  {
51  //int i;
52 
53  // the 0xF indicates the start of a new module
54 
55  if ( (k[pos] & 0xF0000000) == 0xF0000000 ) // and this is now pos
56  {
57  nr_modules++;
58 
59  // std::cout << pos << " " << std::hex << k[pos] << std::dec << std::endl;
60 
61  log_mod_nr = k[pos] & 0xf;
62  l1_trig_nr = k[pos+1] & 0xfff;
63  beam_clock = k[pos+2] & 0xfff;
64  phys_mod_nr = k[pos+3] & 0x1f;
65 
66  // std::cout << "module nr: " << log_mod_nr
67  // << " trig nr: " << l1_trig_nr
68  // << " beam clock " << beam_clock
69  // << " phys. mod nr " << phys_mod_nr << std::endl;
70 
71 
72  if ( log_mod_nr >= HBD_MAX_MODULES)
73  {
74  std::cout << __FILE__ << " " << __LINE__
75  << " wrong logical module number " << log_mod_nr << std::endl;
76  }
77  else
78  {
79  decoded_data2[log_mod_nr] = l1_trig_nr;
80  decoded_data3[log_mod_nr] = beam_clock;
81  decoded_data4[log_mod_nr] = phys_mod_nr;
82  }
83  pos += 4;
84  }
85  else
86  {
87  delete [] iarr;
88  delete [] decoded_data2;
89  delete [] decoded_data3;
90  delete [] decoded_data4;
91  decoded_data2 = 0;
92  decoded_data3 = 0;
93  decoded_data4 = 0;
94  *nwout = 0;
95  return 0;
96  }
97 
98  // now we are supposed to get an 0xE which holds the
99  // channel address
100  while ( (k[pos] & 0xF0000000) == 0xE0000000 ) // we have a first adc
101  {
102 
103  int f_channr = (( k[pos] >>16 ) & 0x3f);
104  pos++;
105  int slot = 48*HBD_NSAMPLES*log_mod_nr + HBD_NSAMPLES*f_channr ;
106 
107  // here we mask out the two highest bits which need to be 0x4
108  while ( (k[pos] & 0xC0000000) == 0x40000000 ) // the remaining ones
109  {
110  int adc0 = ( k[pos] & 0xfff);
111  iarr[slot++] = adc0;
112  int adc1 = ( (k[pos]>>16) & 0xfff);
113  iarr[slot++] = adc1;
114  pos++;
115 
116 /*
117  std::cout << pos << " " << std::hex << k[pos] << std::dec
118  << " " << log_mod_nr << " " << f_channr << " "
119  << adc0 << " " << adc1 << " " << slot << std::endl;
120 */
121 
122 
123  }
124 
125 
126  }
127 
128  }
129  if ( (k[pos] & 0xE0000000) == 0xA0000000 )
130  {
131  // the parity data
132  hbd_parity = (k[pos] & 0xfff);
133  pos++;
134  }
135 
136 
137  *nwout = 48 * HBD_NSAMPLES * HBD_MAX_MODULES;
138  return iarr;
139 }
140 
141 
142 
143 int Packet_hbd_fpgashort::iValue(const int ich, const int is)
144 {
145  if (decoded_data1 == NULL )
146  {
147  if ( (decoded_data1 = decode(&data1_length))==NULL)
148  return 0;
149  }
150 
151  if (ich < 0 || ich >= nr_modules *48) return 0;
152 
153  if ( is == 100) return ( iValue(ich,0) + iValue(ich,1));
154  if ( is == 101) return ( iValue(ich,4));
155  if ( is == 102) return ( iValue(ich,10) + iValue(ich,11));
156 
157  if (is < 0 || is >= HBD_NSAMPLES) return 0;
158 
159  return decoded_data1[ich*HBD_NSAMPLES + is];
160 }
161 
162 // ------------------------------------------------------
163 
164 
165 int Packet_hbd_fpgashort::iValue(const int ich, const char *what)
166 {
167  // now let's derefence the proxy array. If we didn't decode
168  // the data until now, we do it now
169 
170 
171  if (strcmp(what,"TRIGGER") == 0) // user requested TRIGGER
172  {
173  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
174  {
175  if ( (decoded_data1 = decode(&data1_length))==NULL)
176  return 0;
177  }
178  if (ich < 0 || ich >= nr_modules) return 0;
179 
180  return decoded_data2[ich]; // ich really refers to sample index
181  }
182 
183  else if (strcmp(what,"BCLK") == 0) // user requested beam clock
184  {
185 
186  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
187  {
188  if ( (decoded_data1 = decode(&data1_length))==NULL)
189  return 0;
190  }
191  if (ich < 0 || ich >= HBD_MAX_MODULES) return 0;
192 
193  return decoded_data3[ich]; // ich really refers to sample index
194  }
195 
196  else if (strcmp(what,"NRSAMPLES") == 0) // how many samples does this format have?
197  {
198  return HBD_NSAMPLES;
199  }
200 
201  else if (strcmp(what,"MODULEID") == 0) // user requested the module number
202  {
203 
204  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
205  {
206  if ( (decoded_data1 = decode(&data1_length))==NULL)
207  return 0;
208  }
209  if (ich < 0 || ich >= HBD_MAX_MODULES) return 0;
210 
211  return decoded_data4[ich]; // ich really refers to sample index
212  }
213 
214  else if (strcmp(what,"NRMODULES") == 0) // user requested the module number
215  {
216 
217  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
218  {
219  if ( (decoded_data1 = decode(&data1_length))==NULL)
220  return 0;
221  }
222 
223  return nr_modules;
224  }
225 
226  else if (strcmp(what,"PARITY") == 0) // user requested the module number
227  {
228 
229  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
230  {
231  if ( (decoded_data1 = decode(&data1_length))==NULL)
232  return 0;
233  }
234  return hbd_parity;
235 
236  }
237 
238  return 0;
239 }
240 
241 
242 
243 
244 // ------------------------------------------------------
245 
246 void Packet_hbd_fpgashort::dump ( OSTREAM &os)
247 {
248  int i,j;
249 
250  this->identify(os);
251 
252  os << " Number of Modules: " << SETW(8) << iValue(0,"NRMODULES") << " Parity: " << SETW(8) << std::hex << iValue(0,"PARITY") << std::dec << std::endl;
253  os << " Number of Samples: " << SETW(8) << iValue(0,"NRSAMPLES") << std::endl;
254 
255 
256  for (i = 0; i < iValue(0,"NRMODULES"); i++)
257  {
258  os << " Module # " << std::setw(2) << i
259  << " Trigger: " << SETW(8) << iValue(i,"TRIGGER")
260  << " Beam Clock: " << SETW(8) << iValue(i,"BCLK")
261  << " Module Id: " << SETW(8) << iValue(i,"MODULEID")
262  << std::endl;
263  }
264 
265  for (i = 0; i < iValue(0,"NRMODULES") * 48 ; i++)
266  {
267  os << std::setw(5) << i << " | " ;
268  for ( j = 0; j < HBD_NSAMPLES; j++)
269  {
270  os << std::setw(5) << iValue(i,j);
271  }
272  os << " ";
273 /*
274  for ( j = 100; j < 103; j++)
275  {
276  os << std::setw(5) << iValue(i,j);
277  }
278 */
279 
280  os << std::endl;
281  }
282  dumpErrorBlock(os);
283  dumpDebugBlock(os);
284 
285 }