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packet_hbd_fpga.cc
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1 #include "packet_hbd_fpga.h"
2 
3 
4 #define HBD_MAX_MODULES 4
5 
7  : Packet_w4 (data)
8 {
9  nr_modules = 0;
11  {
12  HBD_NSAMPLES = 3;
13  }
14  else
15  {
16  HBD_NSAMPLES = 24;
17  }
18  std::cout << "Samples = " << HBD_NSAMPLES << std::endl;
19 }
20 
21 int *Packet_hbd_fpga::decode ( int *nwout)
22 {
23 
24  int *k;
25 
26  int dlength = getDataLength();
27 
28 
29  k = (int *) findPacketDataStart(packet);
30  if (k == 0)
31  {
32  *nwout = 0;
33  return 0;
34  }
35 
36 
37  int *iarr = new int[ 48 * HBD_NSAMPLES * HBD_MAX_MODULES ];
38 
39 
40  decoded_data2 = new int[ HBD_MAX_MODULES ]; // trig nr
41  decoded_data3 = new int[ HBD_MAX_MODULES ]; // beam clock
42  decoded_data4 = new int[ HBD_MAX_MODULES ]; // module number in crate list
43 
44  memset( iarr, 0, 48*HBD_NSAMPLES*4*HBD_MAX_MODULES);
45  memset( decoded_data2, 0, 4*HBD_MAX_MODULES);
46  memset( decoded_data3, 0, 4*HBD_MAX_MODULES);
47  memset( decoded_data4, 0, 4*HBD_MAX_MODULES);
48 
49  int pos = 0;
50 
51  while ( pos < dlength - 10)
52  {
53  int i;
54  for ( i = 0; i< 10; i++)
55  {
56  if ( (k[pos] & 0xF0000000) != 0x80000000 )
57  {
58  pos++;
59  }
60  else
61  {
62  break;
63  }
64  }
65 
66  if ( (k[pos] & 0xF00FF000) == 0x800FF000 ) // begin of header is now pos
67  {
68  nr_modules++;
69 
70  // std::cout << pos << " " << std::hex << k[pos] << std::dec << std::endl;
71 
72  int log_mod_nr = k[pos] & 0xf;
73  int l1_trig_nr = k[pos+1] & 0xfff;
74  int beam_clock = k[pos+2] & 0xfff;
75  int phys_mod_nr = k[pos+3] & 0x1f;
76 
77  //std::cout << "module nr: " << log_mod_nr
78  // << " trig nr: " << l1_trig_nr
79  // << " beam clock " << beam_clock
80  // << " phys. mod nr " << phys_mod_nr << std::endl;
81 
82 
83  if ( log_mod_nr >= HBD_MAX_MODULES)
84  {
85  std::cout << __FILE__ << " " << __LINE__
86  << " wrong logical module number " << log_mod_nr << std::endl;
87  }
88  else
89  {
90  decoded_data2[log_mod_nr] = l1_trig_nr;
91  decoded_data3[log_mod_nr] = beam_clock;
92  decoded_data4[log_mod_nr] = phys_mod_nr;
93  }
94  pos += 4;
95  }
96  else
97  {
98  delete [] iarr;
99  delete [] decoded_data2;
100  delete [] decoded_data3;
101  delete [] decoded_data4;
102  decoded_data2 = 0;
103  decoded_data3 = 0;
104  decoded_data4 = 0;
105  *nwout = 0;
106  return 0;
107  }
108 
109 
110  while ( (k[pos] & 0xF0002000) == 0x40002000 ) // we have a first adc
111  {
112  int adc = ( k[pos] & 0xfff);
113  int f_channr = (( k[pos] >>16 ) & 0x3f);
114  int f_modnr = (( k[pos] >>22 ) & 0x3);
115  int slot = 48*HBD_NSAMPLES*f_modnr + HBD_NSAMPLES*f_channr ;
116  //std::cout << pos << " " << std::hex << k[pos] << std::dec
117  // << " " << f_modnr << " " << f_channr << " "
118  // << firstadc << " "<< adc << " " << slot << std::endl;
119  iarr[slot++] = adc;
120  pos++;
121  while ( (k[pos] & 0xF0002000) == 0x40000000 ) // the remaining ones
122  {
123  int channr = (( k[pos] >>16 ) & 0x3f);
124  int modnr = (( k[pos] >>22 ) & 0x3);
125  if ( channr != f_channr || f_modnr != modnr )
126  {
127  // std::cout << pos << " chan/mod nr changed unexpectedly "
128  // << std::hex << k[pos] << std::dec << std::endl;
129  break;
130  }
131  adc = ( k[pos] & 0xfff);
132  // std::cout << pos << " " << std::hex << k[pos] << std::dec
133  // << " " << f_modnr << " " << f_channr << " "
134  // << firstadc << " "<< adc << " " << slot << std::endl;
135  iarr[slot++] = adc;
136  pos++;
137  }
138 
139  }
140  if ( (k[pos] & 0xF0000000) == 0x20000000 )
141  {
142  // the parity data
143  pos++;
144  }
145  }
146  *nwout = 48 * HBD_NSAMPLES * HBD_MAX_MODULES;
147  return iarr;
148 
149 }
150 
151 
152 int Packet_hbd_fpga::iValue(const int ich, const int is)
153 {
154  if (ich < 0 || ich >= nr_modules *HBD_NSAMPLES*48) return 0;
155  if (is < 0 || is >= HBD_NSAMPLES) return 0;
156 
157  if (decoded_data1 == NULL )
158  {
159  if ( (decoded_data1 = decode(&data1_length))==NULL)
160  return 0;
161  }
162 
163  return decoded_data1[ich*HBD_NSAMPLES + is];
164 }
165 
166 // ------------------------------------------------------
167 
168 
169 int Packet_hbd_fpga::iValue(const int ich, const char *what)
170 {
171  // now let's derefence the proxy array. If we didn't decode
172  // the data until now, we do it now
173 
174 
175  if (strcmp(what,"TRIGGER") == 0) // user requested TRIGGER
176  {
177  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
178  {
179  if ( (decoded_data1 = decode(&data1_length))==NULL)
180  return 0;
181  }
182  if (ich < 0 || ich >= nr_modules) return 0;
183 
184  return decoded_data2[ich]; // ich really refers to sample index
185  }
186 
187  else if (strcmp(what,"BCLK") == 0) // user requested beam clock
188  {
189 
190  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
191  {
192  if ( (decoded_data1 = decode(&data1_length))==NULL)
193  return 0;
194  }
195  if (ich < 0 || ich >= HBD_MAX_MODULES) return 0;
196 
197  return decoded_data3[ich]; // ich really refers to sample index
198  }
199 
200 
201  else if (strcmp(what,"MODULEID") == 0) // user requested the module number
202  {
203 
204  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
205  {
206  if ( (decoded_data1 = decode(&data1_length))==NULL)
207  return 0;
208  }
209  if (ich < 0 || ich >= HBD_MAX_MODULES) return 0;
210 
211  return decoded_data4[ich]; // ich really refers to sample index
212  }
213 
214  else if (strcmp(what,"NRMODULES") == 0) // user requested the module number
215  {
216 
217  if (decoded_data1 == NULL ) // no mistake, we decode this to get that info
218  {
219  if ( (decoded_data1 = decode(&data1_length))==NULL)
220  return 0;
221  }
222 
223  return nr_modules;
224  }
225 
226  return 0;
227 }
228 
229 
230 
231 
232 // ------------------------------------------------------
233 
235 {
236  int i,j;
237 
238  this->identify(os);
239 
240  os << " Number of Modules: " << SETW(8) << iValue(0,"NRMODULES") << std::endl;
241 
242  for (i = 0; i < iValue(0,"NRMODULES"); i++)
243  {
244  os << " Module # " << std::setw(2) << i
245  << " Trigger: " << SETW(8) << iValue(i,"TRIGGER")
246  << " Beam Clock: " << SETW(8) << iValue(i,"BCLK")
247  << " Module Id: " << SETW(8) << iValue(i,"MODULEID")
248  << std::endl;
249  }
250 
251  for (i = 0; i < iValue(0,"NRMODULES") * 48 ; i++)
252  {
253  os << std::setw(5) << i << " | " ;
254  for ( j = 0; j < HBD_NSAMPLES; j++)
255  {
256  os << std::setw(5) << iValue(i,j);
257  }
258 
259  os << std::endl;
260  }
261  dumpErrorBlock(os);
262  dumpDebugBlock(os);
263 
264 }